The Zero Crossing Detector Engineering Essay

The Zero Crossing Detector Engineering Essay The X 10 transmitter sends data timed with the zero crossing of the power line, thus each unit needs to have a built-in zero crossing detectors. Mainly, the X10 manufactures are using PIC16F8XXX family to detect zero crossing by applying the external interrupt on the RB0 pin, which links to the power line through 5M resistance (to limit the current into the PICmicro) as it is shown in the figure 00. The PICmicro has a protection diodes which are designed to clamp any voltage higher than VDD or lower than VSS. Thus, when a negative half cycle of the AC voltage is applied, the RB0 pin clamps the voltage to VSS 0.5V, this can be interpreted as a logic-0. At the same time, as the AC voltage rises to or over VDD, the logical value will become logic-1. RB-0 is configured for external interrupts, whereas the input buffer is a Schmitt trigger. Therefore, the input threshold (0.2 VDD = 1V) on the falling edge and (0.8 VDD = 4V) on a rising edge. So there is an interrupt occurs on every zero crossing. The following equation is used to calculate the RB0 pin state which will change in relative to the zero crossing V = Vpk*sin(2*Ġ¢*f*t), where Vpk = 320Vand f = 50 Hz On the rising edge, RB0 can go high about 64  µ s after the zero-crossing. However, on the falling edge, it can go low about 16 ÃŽ ¼s before the zero-crossing. 120 kHz Carrier Generator X-10 transmitters use 1msec bursts of a 120 kHz to send information over 50 Hz power lines. Different techniques could be used in order to generate 120 kHz, however, in x10 units are mainly use one of the PICmicro MCUs CCP modules as it is shown in the figure100. The CCP (Capture/Compare/PWM) module of PIC 16F67xA is used in PWM mode to produce a 120 kHz square-wave with a half duty cycle of (50% of the duty cycle). In order to generate the carrier frequency of 120 kHz, the system oscillator capacity was chosen to be 7.680 MHz, Where the frequency of the PWM is the inverse of the period (1/period) And since one instruction is taking four oscillation periods we come up with the term of 4Tosc Main oscillator is 7.680MHz, Tosc = 1/7.680MHz PWM period = 1/120 kHz = 8.333 µs PWM period = [(PR2) + 1] * 4 * Tosc * (TMR2 prescale value) = [(0) + 1] * 4 * 1/7.680MHz * (16) = 8.333 µs After initialization, the CCP (Capture/Compare/PWM) is always enabled, and the register TRISC bit is used to gate On and Off the PWM output. By sitting the TRISC bit = 1, then the pin is an input and the 120 kHz signal is blocked and not accessible to the pin, other than When the TRISC bit = 0, the pin becomes an output and the 120 kHz signal is free and coupled to the AC power line. Before the 120 kHz coupled to the powerline, it will pass through 200à ¢Ã¢â‚¬Å¾Ã‚ ¦ resistance, a transistor amplifier and high pass filter as depicted in the Figure 5. Since the impedance of a capacitor is Zc = 1/(2*Ġ¢*f*C), If f = 120kHz Zc = 1/(2*Ġ¢*120k*0.1*10-6) If f = 50kHz Zc = 1/(2*Ġ¢*50k*0.1*10-6) The capacitor of the high pass filter is equal to 0.1 ÃŽ ¼F which presents low impedance to the 120 kHz carrier frequency, but with 50 Hz power line frequency it will present high impedance. Therefore high pass filter will safely couple the 120 kHz signal to the 50 Hz power line. Finally, the 12 kHz signal should well match with the synchronize of zero crossing with maximum delay about 300 ÃŽ ¼s from the zero-crossing to the beginning of the X-10 envelope in order to be compatible with other x10 receiver. Since the maximum delay of the zero-crossing detector = 64 ÃŽ ¼s 300 ÃŽ ¼s 64 ÃŽ ¼s = 236 ÃŽ ¼s Thus the firmware must begin the transmission of the 120 kHz envelope with maximum time of 236 ÃŽ ¼s after detection of the zero-crossing to. 120 kHz Carrier Detector In order to receive a x10 signal, it is essential to detect the presence of the 120 kHz signal on the 50Hz AC power line. This application requires a specific hardware structure which? contains three blocks placed between the PIC and the power line and subsequence the 120 kHz carrier will bass through all of them to reached RC pin of the PIC. The first block from the power line side is the decoupling capacitor which contains e a 0.1 µ capacitor in parallel with 1Mà ¢Ã¢â‚¬Å¾Ã‚ ¦ resistance. The next one is the high bass filter and the final one is the envelop detector which is connected to the PC pin of the PIC as it shown in figureXX. Since the impedance of a decoupling capacitor is Zc = 1/ (2*Ġ¢*f*C), If f = 120 kHz Zc = 1/ (2*Ġ¢*120k*0.1*10-6) =1/ 0.075 = 13.26 à ¢Ã¢â‚¬Å¾Ã‚ ¦ Zc of 120 kHz = 13.26 à ¢Ã¢â‚¬Å¾Ã‚ ¦ If f = 50 kHz Zc = 1/ (2*Ġ¢*50*0.1*10-6) = 1/3110^-6 = 32.25 k à ¢Ã¢â‚¬Å¾Ã‚ ¦ Zc of 50 Hz = 32.25 k à ¢Ã¢â‚¬Å¾Ã‚ ¦ The capacitor of the decoupling filter is equal to 0.1 ÃŽ ¼ farad which is presenting low impedance (13.26 à ¢Ã¢â‚¬Å¾Ã‚ ¦) to the 120 kHz carrier frequency, but with 50 Hz power line frequency it will present high impedance (32.25 k à ¢Ã¢â‚¬Å¾Ã‚ ¦). Therefore the decoupling filter will safely couple the 120 kHz signal detector to the 50 Hz power line and allow only 120 kHz to bass through it. The next block is another high pass filter, design an RC filter that will pass only 120 kHz carrier and attenuate the entire 50Hz. The second high pass filter scheme is shown below Where the high pass filter characteristics is shown in the next scheme ωp is the passband edge of the high pass filter ωp = 1 / CR where C = 150 pF and R = 33 k à ¢Ã¢â‚¬Å¾Ã‚ ¦ ωp = 2 Ġ¢ fp fp = 1 / 2*Ġ¢*C*R fp = 1/(2*3.14*33*10^3*150*10^-9). fp = 32 kHz. Where, fp is the frequency of the passband edge that will assures all the 50 Hz signal is completely attenuated, at the same time as the 120 kHz signal is passed through the filter to the amplifier stages. The signals are inter the amplifier stage with a value between ten millivolts to a few hundred millivolts. The module must amplify the carrier to certain limit and converted to a logic level signal that the PIC can detect. The amplification, however, must be carefully selected in order to prevent the signal will pass through the first stage which is the tuned amplifier stage where the 120 kHz signal is amplified by using a series of 4069UB inverters to configure as high gain amplifiers. The tuned amplifiers operate with peak response at 120 kHz at the first two stages while the next two stages are untuned amplifier but provide additional amplification. The amplified 120 kHz signal is passed to the envelope detector block which is containing a diode, capacitor, and resistor. The out put of the envelope detector is buffered through an inverter and finally the inverse of the amplified 120 kHz is presented to an input pin (RC3) of the PIC16F8xxx. When the zero crossing is interrupt the RC3 will checked to see whether or not the carrier is present within the 1 ms transmission envelope. A stream of 1 volt is representing the presence of the carrier while 0 is the absence of the carrier. Transformerless Power Supply X10 modules used PIC16F877A or any other PIC requires a 5V supply to feed the board circuit. Since X-10 units are intended to be plugged into a wall outlet, a transformerless power supply is used to provide the require voltage. There are two significant characteristics of transformerless supplies that should be kept in mind: lack of isolation from the 240 volt AC and limited current capacity. Figure00 illustrates the transformerless power supply diagram used in this application. As it shown in figure00, a 220v VDR (voltage dependent resistor) being and connected between Line and Neutra to protect the circuit from spikes on the AC power line. 1Mà ¢Ã¢â‚¬Å¾Ã‚ ¦ resister connects in parallel with two capacitors to provide a discharge path for the voltage left on the capacitors when the module is unplugged from the wall. The voltage across 1000Mfarad was rectified by using two diodes and finally a 5.1V Zener diode to produce a 5V supply for the circuit. Load Switch There are two options to control a mains rated load, either to use a Triac or a relay. Electrical designers used relays in many different applications because they are suitable for very high power loads and very low power loads also when the main rated load need to be isolated and finally when the load require a relatively slow toggling rates. A Triac is the best option for switching non isolated medium power loads and they have a rapid switching capability and subsequence they are very suitable for dimming and lamp control. x10 manufacturer used a Triac as a load switch of the x10 units because its medium power switching capacity and most of the home appliances are consumes a medium power. In addition, Triacs are an inexpensive three-terminal device designed to switch a medium current load and has been used extensively in home appliances such as lamp dimmers and motor speed controllers. The main two terminals M1 and M2 are wired in series with the load figure00. A Triac is, three-te rminal device that acts as a high-speed, bidirectional AC switch, two terminals, MT1 and MT2, are wired in series with the load. A small trigger current between MT1 and the gate allow conduction to occur between MT2 and MT1.when the latching occur between M1 and M2, the load current continues to flow even after the gate current is disconnected, as long as the load current exceeds the latching value. Therefore, when the 50Hz AC voltage falls below the latching voltage near each zero-crossing, the Triac will automatically switch off. There are two ways to maintain the load current beyond each single half cycle of the 50Hz AC supply, either the gate current have to be maintained continuously or the triac have to be retriggered each half-cycle of 50Hz. the advantage of the pulse trigger is that only lower average current is required. Typically, the trigger pulse duration must be long enough for the load current in order to reach the latching current. A L4008L6 Triac was selected for X10 module because it has a sensitive gate that the logic level output of the PIC MCU I/O pin will directly control it. Although, the PIC MCU can provide only positive voltages to the gate, the sensitive gate Triac can control the alternative AC current in both directions through the device. A lamp dimmer can be created by including a delay between the time that the trigger current is provided to the Triac from the PIC MCU and the time of each zero-crossing. In other words, TRIACs can be used to control the brightness of a light by switching the 50Hz AC power on part-way through each half cycle (Figure 2 and Figure 3). Therefore x10 maker allows the PIC MCU to directly drive the gate of a TRIAC through a current limiting resistor. By controlling the power-line cycle, the PIC MCU can control the average voltage across the lamp, and therefore the brightness . . .(unclear) http://www3.telus.net/Whalco/SDim.htm ftp://ftp.efo.ru/pub/cypress/psoc/capsense/app/TD-AN_LampDimmerAppNote.pdf http://www.freescale.com/files/microcontrollers/doc/app_note/AN2839.pdf

Interdisciplinary Approach to International Relations Theory Essay

International relations is generally the study of foreign affairs and international issues among states within a global system. Here, the roles of the states, international agencies, and non-government organizations are analyzed using proper statistical techniques or induction methods. In the past, the study of IR theories was usually limited to geo-political variables (and some economic variables). Today, the approach to studying IR theories is essentially interdisciplinary in orientation and global in application. Total effects of different types of variables are generally taken into consideration. For example, Wallerstein’s creation of the world system theory was essentially based on two determinant variables: political power of states and economic bargaining power. Wallerstein argued that political power determines the global status of a particular state. Economic bargaining power determines the level of control of a particular state in the world economy. In an interdisciplinary approach, propositions from other legitimate field of subjects are usually taken into account. Academic propositions and hypotheses from other fields are given consideration for their explanatory value. Interdisciplinary approach to the study of IR theories provides a clear whole figure of global phenomena. In short, by expanding the bases of study, the predictive value of such approach increases. This, essentially, makes a particular IR theory to be self-sufficient and reliable. Does this make ‘understanding’ more complicated? In fact, an interdisciplinary approach to IR makes the whole analysis more simple and flexible. A person reading an IR theory or proposition can easily pinpoint the ‘observed possible causes’ of global events. In short, while an interdisciplinary approach broadens the analysis, it nevertheless gives a complete picture of a particular event. Hence, IR models become complicated without a possible loss on understanding. Therefore, it is possible to say that the level of abstract complications can result to a narrower form of analysis (wrong functional form). It is also to argue that the best IR models are the ones which take into account the existence of variables. The form first would be thoroughly examined before giving any prediction.

Industry Analysis of Airlines Industry

Banking history in Nepal: In the context of Nepal, it is very difficult to trace the correct chorological history of the Banking systems in Nepal because there are no sufficient historical records and data about Banking in Nepal. Nepal bank Ltd. is the first modern bank of Nepal. It is taken as the milestone of modern banking of the country. Nepal bank marks the beginning of a new era in the history of the modern banking in Nepal. This was established in 1937 A. D. Nepal Bank has been inaugurated by King Tribhuvan Bir Bikram Shah Dev on 30th Kartik 1994 B.S. Nepal bank was established as a semi government bank with the authorized capital of Rs. 10 million and the paid -up capital of Rs. 892 thousand. Until mid-1940s, only metallic coins were used as medium of exchange. So the Nepal Government (His Majesty Government on that time) felt the need of separate institution or body to issue national currencies and promote financial organization in the country. Nepal Bank Ltd. remained the o nly financial institution of the country until the foundation of Nepal Rastra Bank is 1956 A.D. Due to the absence of the central bank, Nepal Bank has to play the role of central bank and operate the function of central bank. Hence, the Nepal Rastra Bank Act 1955 was formulated, which was approved by Nepal Government accordingly, the Nepal Rastra Bank was established in 1956 A. D. as the central bank of Nepal. Nepal Rastra Bank makes various guidelines for the banking sector of the country. A sound banking system is important for smooth development of banking system. It can play a key role in the economy.It gathers savings from all over the country and provides liquidity for industry and trade. In 1957 A. D. Industrial Development Bank was established to promote the industrialization in Nepal, which was later converted into Nepal Industrial Development Corporation (NIDC) in 1959 A. D. Rastriya Banijya Bank was established in 1965 A. D. as the second commercial bank of Nepal. The fin ancial shapes for these two commercial banks have a tremendous impact on the economy. That is the reason why these banks still exist in spite of their bad position.As the agriculture is the basic occupation of major Nepalese, the development of this sector plays in the prime role in the economy. So, separate Agricultural Development Bank was established in 1968 A. D. This is the first institution in agricultural financing. For more than two decades, no more banks have been established in the country. After declaring free economy and privatization policy, the government of Nepal encouraged the foreign banks for joint venture in Nepal. Today, the banking sector is more liberalized and modernized and systematic managed.There are various types of bank working in modern banking system in Nepal. It includes central, development, commercial, financial, co-operative and Micro Credit (Grameen) banks. Technology is changing day by day. And changed technology affects the traditional method of the service of bank. Banking software, ATM, E-banking, Mobile Banking, Debit Card, Credit Card, Prepaid Card etc. services are available in banking system in Nepal. It helps both customer and banks to operate and conduct activities more efficiently and effectively.For the development of banking system in Nepal, NRB refresh and change in financial sector policies, regulations and institutional developments in 1980 A. D. Government emphasized the role of the private sector for the investment in the financial sector. These policies opened the doors for foreigners to enter into banking sector in Nepal under joint venture. Some foreign ventures are also established in Nepal such as Nepal Bangladesh Bank, Standard Chartered Bank, Nepal Arab Bank, State Bank of India, ICICI Bank, Everest Bank, Himalayan Bank, Bank of Kathmandu, Nepal Indo-Suez Bank and Nepal Sri Lanka Merchant Bank etc.The NRB will classify the institutions into â€Å"A† â€Å"B† â€Å"C† â€Å"D† groups on the basis of the minimum paid-up capital and provide the suitable license to the bank or financial institution. Group ‘A’ is for commercial bank, ‘B’ for the development bank, ‘C’ for the financial institution and ‘D’ for the Micro Finance Development Banks. Generally banks in Nepal are opened 9 am to 3 pm Sunday to Thursday and 9 am to 1 am on Friday. But nowadays most of banks in Kathmandu are opened throughout the week.There are 32 commercial banks, 79 development banks, 79 financial companies, 18 micro credit (Grameen) development banks and 16 saving and credit co-operation(licensed by Nepal Rastra Bank) are established so far in Nepal. The bank with the largest network in Nepal is The Nepal Bank Ltd. These commercial banks and financial institutions have played significant roles in creating banking habit among the people, widening area and business communities and the government in various ways.

The Effects Of Cyberbullying On The Internet - 1449 Words

This research benefits everyone who engages in the social networking on the internet with the primary focus being the school aged adolescents and their parents. By exposing the issue in hand and the negative impacts it carries will hopefully create positive response. Not only is cyberbullying a huge threat in present time, but it can also lead to long term effects that could permanently ruin an individual going through adulthood. Some of these devastating effects include: suicide, grades start dropping, overall school participation begins to decline, depression, and vengeance (Mirsky, E. L., Omar, H. A. 2015). The more society becomes involves in the situation, the better chance society has in creating new laws to combat cyberbullying†¦show more content†¦present laws that are in place become a problem. The country has become divided when it comes to laws against cyberbullying. Several have implemented cyberbullying into their statutes and others have not. The computer and fraud abuse act (CFAA) is the only current federal law that is even remotely close and relevant to cyber laws and the prosecution of cyberbullying. The CFAA was set in stone in 1984 by congress as an anti-hacking law when computer crime started to become popular (King, A. V. 2010). This act was originally referred to as the counterfeit Access Device and Computer Fraud Abuse Act, this statute only covered large financial institutions and government computers (PBS, 2012). During 1996, certain amendments were pushed towards the CFAA under the US Patriot act. Furthermore, during that year the National Information Infrastructure Protection Act was introduced during this time. This act included language that was associated with any computer linked to the internet (PBS, 2012). CFAA’s main concern focuses on the language aspect of it. This is because the language was too vague and this prevented crimes associated with computer fraud from ever being prosecuted. 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